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[Author] An Lin(47hit)

41-47hit(47hit)

  • Normalization of Output Information for a Turbo Decoder Using SOVA

    Yi-Nan LIN  Wei-Wen HUNG  

     
    LETTER-Communication Theory and Signals

      Vol:
    E90-A No:10
      Page(s):
    2336-2339

    It has been shown that the output information produced by the soft output Viterbi algorithm (SOVA) is too optimistic. To compensate for this, the output information should be normalized. This letter proposes a simple normalization technique that extends the existing sign difference ratio (SDR) criterion. The new normalization technique counts the sign differences between the a-priori information and the extrinsic information, and then adaptively determines the corresponding normalization factor for each data block. Simulations comparing the new technique with other well-known normalization techniques show that the proposed normalization technique can achieve about 0.2 dB coding gain improvement on average while reducing up to about 1/2 iteration for decoding.

  • Hiding Data Reversibly in an Image via Increasing Differences between Two Neighboring Pixels

    Ching-Chiuan LIN  Nien-Lin HSUEH  

     
    PAPER-Image Processing and Video Processing

      Vol:
    E90-D No:12
      Page(s):
    2053-2059

    This paper proposes a simple, efficient method that, based on increasing the differences between two neighboring pixels, losslessly embeds a message into a host image. The point at which the number of pixel differences in the image is at a maximum is selected to embed the message. The selected difference is increased by 1 or left unchanged if the embedded bit is "1" or "0", respectively. On the other hand, differences larger than the selected difference are increased by 1. Increasing a difference is done by adding 1 to or subtracting 1 from the pixel if its value is larger or smaller than its preceding pixel, respectively. Experimental results show that the proposed method can achieve a high payload capacity while the image distortion of the stego-image remains minimal.

  • Robust Lightweight Embedded Virtualization Layer Design with Simple Hardware Assistance

    Tsung-Han LIN  Yuki KINEBUCHI  Tatsuo NAKAJIMA  

     
    PAPER-Computer System and Services

      Vol:
    E95-D No:12
      Page(s):
    2821-2832

    In this paper, we propose a virtualization architecture for a multi-core embedded system to provide more system reliability and security while maintaining performance and without introducing additional special hardware supports or implementing a complex protection mechanism in the virtualization layer. Embedded systems, especially consumer electronics, have often used virtualization. Virtualization is not a new technique, as there are various uses for both GPOS (General Purpose Operating System) and RTOS (Real Time Operating System). The surge of the multi-core platforms in embedded systems also helps consolidate the virtualization system for better performance and lower power consumption. Embedded virtualization design usually uses two approaches. The first is to use the traditional VMM, but it is too complicated for use in the embedded environment without additional special hardware support. The other approach uses the microkernel, which imposes a modular design. The guest systems, however, would suffer from considerable modifications in this approach, as the microkernel allows guest systems to run in the user space. For some RTOSes and their applications originally running in the kernel space, this second approach is more difficult to use because those codes use many privileged instructions. To achieve better reliability and keep the virtualization layer design lightweight, this work uses a common hardware component adopted in multi-core embedded processors. In most embedded platforms, vendors provide additional on-chip local memory for each physical core, and these local memory areas are only private to their cores. By taking advantage of this memory architecture, we can mitigate the above-mentioned problems at once. We choose to re-map the virtualization layer's program on the local memory, called SPUMONE, which runs all guest systems in the kernel space. Doing so, it can provide additional reliability and security for the entire system because the SPUMONE design in a multi-core platform has each instance installed on a separate processor core. This design differs from traditional virtualization layer design, and the content of each SPUMONE is inaccessible to the others. We also achieve this goal without adding overhead to the overall performance.

  • A Novel Two-Stage Channel Estimation Method for Wireless Communications

    Wei-Jian LIN  Tsui-Tsai LIN  Chia-Chi HUANG  

     
    PAPER-Wireless Communication Technology

      Vol:
    E87-B No:6
      Page(s):
    1479-1486

    In this paper, we proposed a novel two-stage channel estimation (2S-CE) method. In contrast to conventional channel estimation methods, this method makes the maximum use of the information contributed by the known data in every transmission burst. In the first stage, the least-squares (LS) algorithm was used to estimate the channel impulse response (CIR) based on the normal training sequence. Then the maximum channel memory was estimated and used to locate the uncorrupted data in the guard interval. In the second stage, the uncorrupted data together with the normal training sequence were sent to the LS algorithm again to obtain the fine-tuned CIR. To verify the efficiency of the proposed 2S-CE method, both a theoretical analysis and computer simulations have been done. Computer simulation results confirm the analysis results and demonstrate that the proposed 2S-CE method outperforms a conventional single-stage channel estimation method.

  • Faster Key Generation of Supersingular Isogeny Diffie-Hellman

    Kaizhan LIN  Fangguo ZHANG  Chang-An ZHAO  

     
    PAPER-Cryptography and Information Security

      Pubricized:
    2022/05/30
      Vol:
    E105-A No:12
      Page(s):
    1551-1558

    Supersingular isogeny Diffie-Hellman (SIDH) is attractive for its relatively small public key size, but it is still unsatisfactory due to its efficiency, compared to other post-quantum proposals. In this paper, we focus on the performance of SIDH when the starting curve is E6 : y2 = x3 + 6x2 + x, which is fixed in Round-3 SIKE implementation. Inspired by previous works [1], [2], we present several tricks to accelerate key generation of SIDH and each process of SIKE. Our experimental results show that the performance of this work is at least 6.09% faster than that of the SIKE implementation, and we can further improve the performance when large storage is available.

  • A Near-Optimal Low-Complexity Transceiver for CP-Free Multi-Antenna OFDM Systems

    Chih-Yuan LIN  Jwo-Yuh WU  Ta-Sung LEE  

     
    PAPER-Wireless Communication Technologies

      Vol:
    E89-B No:1
      Page(s):
    88-99

    Conventional orthogonal frequency division multiplexing (OFDM) system utilizes cyclic prefix (CP) to remove the channel-induced inter-symbol interference (ISI) at the cost of lower spectral efficiency. In this paper, a generalized sidelobe canceller (GSC) based equalizer for ISI suppression is proposed for uplink multi-antenna OFDM systems without CP. Based on the block representation of the CP-free OFDM system, there is a natural formulation of the ISI suppression problem under the GSC framework. By further exploiting the signal and ISI signature matrix structures, a computationally efficient partially adaptive (PA) implementation of the GSC-based equalizer is proposed for complexity reduction. The proposed scheme can be extended for the design of a pre-equalizer, which pre-suppresses the ISI and realizes CP-free downlink transmission to ease the computational burden of the mobile unit (MU). Simulation results show that the proposed GSC-based solutions yield equalization performances almost identical to that obtained by the conventional CP-based OFDM systems and are highly resistant to the increase in channel delay spread.

  • A Genetic Grey-Based Neural Networks with Wavelet Transform for Search of Optimal Codebook

    Chi-Yuan LIN  Chin-Hsing CHEN  

     
    PAPER-Neural Networks and Bioengineering

      Vol:
    E86-A No:3
      Page(s):
    715-721

    The wavelet transform (WT) has recently emerged as a powerful tool for image compression. In this paper, a new image compression technique combining the genetic algorithm (GA) and grey-based competitive learning network (GCLN) in the wavelet transform domain is proposed. In the GCLN, the grey theory is applied to a two-layer modified competitive learning network in order to generate optimal solution for VQ. In accordance with the degree of similarity measure between training vectors and codevectors, the grey relational analysis is used to measure the relationship degree among them. The GA is used in an attempt to optimize a specified objective function related to vector quantizer design. The physical processes of competition, selection and reproduction operating in populations are adopted in combination with GCLN to produce a superior genetic grey-based competitive learning network (GGCLN) for codebook design in image compression. The experimental results show that a promising codebook can be obtained using the proposed GGCLN and GGCLN with wavelet decomposition.

41-47hit(47hit)